sim_utils_pkg Package Body Reference

Package Body >> sim_utils_pkg

Functions
string	vec_to_str ( vec: in std_logic_vector )
string	int_to_hex_str ( val: in integer , width: in integer 2 )

Procedures
	log_to_file( constant file_name: in string constant message: in string constant is_error: in boolean false )
	check_value( constant actual: in std_logic_vector constant expected: in std_logic_vector constant msg_tag: in string variable error_cnt: inout integer constant file_name: in string " reporte_final_1.txt " )

Detailed Description

Definition at line 33 of file sim_utils_pkg.vhd.

Member Function/Procedure/Process Documentation

check_value()

check_value	(	constant	actual in std_logic_vector ,
		constant	expected in std_logic_vector ,
		constant	msg_tag in string ,
		variable	error_cnt inout integer ,
		constant	file_name in string "reporte_final_1.txt"  )

Definition at line 78 of file sim_utils_pkg.vhd.

"reporte_final_1.txt"    procedure check_value(
        constant actual    : in std_logic_vector;
        constant expected  : in std_logic_vector;
        constant msg_tag   : in string;
        variable error_cnt : inout integer;
        constant file_name : in string := 
    ) is
    begin
        if (actual = expected) then
            log_to_file(file_name, msg_tag & " OK | Val: " & vec_to_str(actual), false);
            report "[SIM] " & msg_tag & " OK";
        else
            error_cnt := error_cnt + 1;
            log_to_file(file_name, msg_tag & " FALLO | Exp: " & vec_to_str(expected) & " Act: " & vec_to_str(actual), true);
            report "[SIM] " & msg_tag & " FAIL" severity error;
        end if;
    end procedure;

int_to_hex_str()

string int_to_hex_str	(		val in integer ,
			width in integer 2  )

Definition at line 47 of file sim_utils_pkg.vhd.

    function int_to_hex_str(val : integer; width : integer := 2) return string is
        variable temp : std_logic_vector((width * 4) - 1 downto 0);
        constant hex_chars : string(1 to 16) := "0123456789ABCDEF";
        variable res : string(1 to width);
        variable nibble : integer;
        begin
            temp := std_logic_vector(to_unsigned(val, width * 4));
            for i in 0 to width-1 loop
                nibble := to_integer(unsigned(temp((i+1)*4-1 downto i*4)));
                res(width-i) := hex_chars(nibble + 1);
            end loop;
            return res;
    end function;

log_to_file()

log_to_file	(	constant	file_name in string ,
		constant	message in string ,
		constant	is_error in boolean false  )

Definition at line 61 of file sim_utils_pkg.vhd.

    procedure log_to_file(
        constant file_name : in string;
        constant message   : in string;
        constant is_error  : in boolean := false
    ) is
        file f : text;
        variable l : line;
        variable prefix : string(1 to 7);
    begin
        if is_error then prefix := "ERROR :"; else prefix := "INFO  :"; end if;
        
        file_open(f, file_name, append_mode);
        write(l, "[" & time'image(now) & "] - " & prefix & " " & message);
        writeline(f, l);
        file_close(f);
    end procedure;

vec_to_str()

string vec_to_str

(

vec in std_logic_vector  )

Definition at line 35 of file sim_utils_pkg.vhd.

    function vec_to_str(vec : std_logic_vector) return string is
        variable res : string(1 to vec'length);
    begin
        for i in 0 to vec'length-1 loop
            if vec(vec'high-i) = '1' then res(i+1) := '1';
            elsif vec(vec'high-i) = '0' then res(i+1) := '0';
            else res(i+1) := 'X';
            end if;
        end loop;
        return res;
    end function;

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The documentation for this design unit was generated from the following file:

• /home/runner/work/VICON/VICON/projects/vicon_cmgj/tb/sim_utils_pkg.vhd